And more than 70 % hardware are tested during microcode self - test since the execution of micro program can cover other data paths . boundary scan is designed according to ieee1149 . 1 , and some other instructions such as degug , runbist are provided to support internal fault testing , online debugging and built - in self - test besides the several necessary insructions . internal scan is implemented by partial scan , through this the boundary of logic component and user - cared system registers can be selected to be scanned Bist用于測試cpu的微碼rom ,其它ram則利用微碼rom中的微程序進(jìn)行測試,而微程序的運(yùn)行則可以順帶覆蓋其它數(shù)據(jù)通路,從而使高達(dá)70 %的硬件得到測試;邊界掃描按ieee1149 . 1標(biāo)準(zhǔn)設(shè)計,除必備的幾條邊界掃描指令外,還提供了debug 、 runbist等指令以支持內(nèi)部故障測試、在線調(diào)試及內(nèi)建自測試;內(nèi)部掃描采用部分掃描策略,選擇邏輯部件的邊界及用戶關(guān)心的系統(tǒng)寄存器進(jìn)行掃描,從而實現(xiàn)了硬件邏輯劃分,方便了后續(xù)的測試碼產(chǎn)生和故障模擬,并為在線調(diào)試打下了基礎(chǔ)。
The author is absorbed in research on technology of coprocessor design . in the floating - point addition the paper proposes a carry chain of dynamic and static mixed circuits and a good balance between speed and area of predicting leading - zero logic circuits , considering algorithm and construction of logic circuits . an approach of micro program controller design for coprocessor is put forward and a test bench is given to verify its function 筆者研究協(xié)處理器的設(shè)計技術(shù),在浮點加法器中提出動態(tài)與靜態(tài)結(jié)合設(shè)計進(jìn)位鏈的方案以及前導(dǎo)零預(yù)測面積與速度的折衷方法;在微程序控制器的設(shè)計中提出一種協(xié)處理器微程序控制器的設(shè)計方法,并且給出其功能驗證的測試平臺。